Diff for "MemoryStallClockCycles"

Differences between revisions 3 and 4

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  Memory-stall clock cycles = Read-stall cycles + Write-stall cycles

  Write-stall cycles = ((Writes/program) x write miss rate x Write miss penalty) + Write buffer stalls

Two main effects on performance:

The lower the CPI, the more pronounced the impact of stall cycles
The main memory system is unlikely to improve as fast as processor cycle time. When calculating CPI, the cache miss penalty is measured in CPU clock cycles needed for a miss. Thus if the main memories of two machines have teh same absolute access time, a higher CPU clock rate leads to a larger miss penalty.

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-  ⇤ ← Revision 3 as of 2004-03-15 02:54:56 → 
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+   ← Revision 4 as of 2004-03-15 03:14:44 → ⇥
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  Editor: dot
  Comment:
-Deletions are marked like this.
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+Two main effects on performance:

   1. The lower the CPI, the more pronounced the impact of stall cycles
   1. The main memory system is unlikely to improve as fast as processor cycle time. When calculating CPI, the cache miss penalty is measured in CPU clock cycles needed for a miss. Thus if the main memories of two machines have teh same absolute access time, a higher CPU clock rate leads to a larger miss penalty.