|
Size: 1535
Comment:
|
Size: 3052
Comment:
|
| Deletions are marked like this. | Additions are marked like this. |
| Line 1: | Line 1: |
| * AddressingModes * AmdahlsLaw |
|
| Line 4: | Line 6: |
| * AverageNormalizedExecutionTime * ["Bijection"] * BooleanAlgebra * BooleanTerm * BoothsAlgorithm * CaChe * CacheBlock * CacheCoherenceProtocols * CacheLine |
|
| Line 6: | Line 17: |
| * CpuTime * CriticalSection * ["Cryptography"] * CyclesPerInstruction (CPI) * DataPath |
|
| Line 7: | Line 23: |
| * DelayBandwidthProduct * DelayedBranch |
|
| Line 11: | Line 29: |
| * DynamicSetOperations * ExecutionTime * ExpectedValue * FileSystem (Free BSD) |
|
| Line 13: | Line 35: |
| * FirstOrderTheory * FiveClassicPartsOfaComputer |
|
| Line 14: | Line 38: |
| * FloatingPointRepresentation (IEEE 754) | |
| Line 15: | Line 40: |
| * FrameBuffer * FreeBooleanAlgebra * GeometricMean * GraphTheoryPage |
|
| Line 17: | Line 46: |
| * HammingCode * HardwareDesignPrinciples |
|
| Line 18: | Line 49: |
| * InformationRetrieval | |
| Line 23: | Line 55: |
| * LogicalImplication (|= symbol and also |-) | * InstructionSetArchitecture (ISA) * InterfaceMessagingProcessor (IMP) * InvertedFile * LogicalImplication ([[latex2($$\models$$)]] and [[latex2($$\vdash$$)]]) * LogicalMemory (START EDITING HERE) |
| Line 25: | Line 61: |
| * ["Latency"] * LeastFixedPoint |
|
| Line 26: | Line 64: |
| * LinkerSteps | |
| Line 28: | Line 67: |
| * MemoryHierarchy * MemoryStallClockCycles |
|
| Line 30: | Line 71: |
| * MultiProtocolLabelSwitching (MPLS) | |
| Line 32: | Line 72: |
| * ObjectFile | |
| Line 34: | Line 75: |
| * PageTable * ["Performance"] * PipeLine * PostingsFile |
|
| Line 35: | Line 80: |
| * PresburgerArithmetic | |
| Line 37: | Line 83: |
| * ["Processor"] or CPU * QueuingTheory * RaceCondition |
|
| Line 38: | Line 87: |
| * ["Register"] (MIPS register) | |
| Line 39: | Line 89: |
| * ResponseTime | |
| Line 44: | Line 95: |
| * SemiAlgebraicSets | |
| Line 45: | Line 97: |
| * SemiLinearSets | |
| Line 47: | Line 100: |
| * SpatialExtent * SpeedUp * ["Steganography"] * SuperScalar |
|
| Line 48: | Line 105: |
| * ["taxonomy"] * TcpFastRetransmit * TcpFastRecovery * ThroughPut |
|
| Line 49: | Line 110: |
| * ["taxonomy"] | * TreeStructures |
| Line 52: | Line 113: |
| * UninterpretedFunctions | |
| Line 53: | Line 115: |
| * VirtualMemory * WallClockTime |
AutonomousSystem (AS)
- ["Bijection"]
CidrVsSubnetting (CIDR, Subnetting and Class A-E Definitions)
CompleteLogic What does it mean for a logic to be complete
- ["Cryptography"]
CyclesPerInstruction (CPI)
["Decidable"] and SemiDecidable
- ["Dichotomy"]
FileSystem (Free BSD)
FloatingPointRepresentation (IEEE 754)
InternetProtocolV4 (IPv4)
InternetProtocolV6 (IPv6)
LogicalImplication (latex2($$\models$$) and latex2($$\vdash$$))
LogicalMemory (START EDITING HERE)
- ["Latency"]
MaximumTransmissionUnit (MTU)
- ["Model"] of a logic formula
OsiModel (7 layer OSI network Model)
- ["Performance"]
["Proposition"] or PropositionalLogic
- ["Processor"] or CPU
- ["Register"] (MIPS register)
- ["Satisfiable"]
SemiDecidable and ["Decidable"]
- ["Steganography"]
- ["Tautology"]
- ["taxonomy"]
- ["Undecidable"]
- ["Valid"] Logic Formula