|
Size: 752
Comment:
|
Size: 964
Comment:
|
| Deletions are marked like this. | Additions are marked like this. |
| Line 16: | Line 16: |
| '''Tags''' contain the address information required to identify if the information in a cache location coresponds to the data needed. These tags contain the upper bits: | '''Tags''' contain the address information required to identify if the information in a cache location coresponds to the data needed. These tags contain the upper bits of the memory address. Below we show the division for an 8 bit address with 8 memory locations in the cache. |
| Line 20: | Line 20: |
The upper bits are contained in the tag. https://www.scotnpatti.com/images/directmappedcache2.jpg |
Cache
Direct Mapped Cache Cache's are directed mapped if each memory location is mapped to exactly one location in the cache. An example would be:
location = (Block Address) MOD (Number of cache blocks in the cache)
In this way we can map a memory location to a cache location.
Example: Suppose we have a cache with 8 slots 2^3. Then a word at 45 would be found at slot 5 in the cache.
https://www.scotnpatti.com/images/directmappedcache.jpg
Tags contain the address information required to identify if the information in a cache location coresponds to the data needed. These tags contain the upper bits of the memory address. Below we show the division for an 8 bit address with 8 memory locations in the cache.
Upper bits |
Lower bits |
|||||||||||||
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
|||||||
The upper bits are contained in the tag.
